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Power Architecture / IBM / Supercomputers / Blue Gene / Lawrence Livermore National Laboratory / QCDOC / Cell / Computer cluster / PowerPC / Computing / Computer architecture / Parallel computing


Document Date: 2005-12-01 18:00:24

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File Size: 316,38 KB

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City

Rochester / /

Company

Los Alamos National Laboratory / IBM Server Group / Lawrence Livermore National Laboratory / /

Currency

AMD / USD / AWG / /

Event

Business Partnership / Product Release / Force Majeure / /

Facility

Lawrence Livermore National Laboratory / Los Alamos National Laboratory / Columbia University / S Hall / California Institute of Technology / University of California / /

IndustryTerm

torus network / system-on-a-chip technology / teraFLOPS-scale computing / software errors / tree network / rack electronics / collective communications / message processor / inter-node communications network functions / communications processor / communications intensive operations / internal and external customer applications / retransmission protocol / compute-intensive applications / computing / token protocol / software packet header / adaptive sub-network / target peak processing power / scientific computing / speed interconnection networks / /

OperatingSystem

L3 / /

Organization

California Institute of Technology / Columbia University / University of California / U.S. Department of Energy / Floating-Point Unit / ASIC / United States Department of Energy ASCI Advanced Architecture Research Program / San Diego Supercomputer Center / /

Person

Lawrence Livermore / /

Position

driver / MP / pre-compensating driver / arbiter / integrated external DDR memory controller / representative / controller / /

Product

Local Injection / PowerPC / BlueGene / /

ProvinceOrState

Manitoba / California / /

Technology

CMOS processors / floating point unit / message processor / JTAG / system-on-a-chip / system-on-a-chip technology / SRAM / embedded PowerPC processor / ASIC / Flow control / token protocol / communications processor / SDRAM / 25 3072 77k Clock chip / HIPPI-like retransmission protocol / 440 processor / embedded processor / gigabit Ethernet / /

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