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Electrical circuits / Instruction set architectures / MIPS architecture / Asynchronous circuit / R4000 / Quasi Delay Insensitive / R4600 / Alpha 21064 / Central processing unit / Computer architecture / Electronic engineering / Computer hardware


1 Three Generations of Asynchronous Microprocessors Alain J. Martin, Mika Nystr¨om, Catherine G. Wong Department of Computer Science
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Document Date: 2003-08-13 19:45:22


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City

L.a. / /

Company

HP / AMULET2e / /

Currency

pence / /

Facility

MiniMIPS pipeline / University of Manchester / University of Tokyo / Computer Science California Institute of Technology Pasadena / /

IndustryTerm

equivalent technology / pulldown network / energy consumption / research / energy-efficient design / low energy consumption / energy efficiency / energy complexity / lower energy / synthesis tools / energy-efficiency features / asynchronous chips / energy / /

Organization

Catherine G. Wong Department of Computer Science California Institute of Technology Pasadena / University of Tokyo / University of Manchester / /

Person

Alain J. Martin / Mika Nystr¨om / /

Position

guard / General / controller / /

ProgrammingLanguage

Modula-3 / /

ProvinceOrState

California / /

Technology

Alpha / 0.6-µm technology / 0.35-µm technology / same technology / RISC processor / 0.35-µm technologies / simulation / 0.5-µm technology / CAD / /

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