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Routing / Network topology / Router / Routing protocols / Network switch / SGI Origin / Topology / Fat tree / Network architecture / Computing / Electronics


Flattened Butterfly : A Cost-Efficient Topology for High-Radix Networks John Kim, William J. Dally Dennis Abts
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Document Date: 2007-04-03 18:23:10


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File Size: 417,47 KB

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City

San Diego / /

Company

CA 94305 Cray Inc. / TSMC / /

Country

United States / /

Currency

pence / USD / /

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Facility

William J. Dally Dennis Abts Computer Systems Laboratory Stanford University / /

IndustryTerm

indirect networks / highradix networks / kary n-cube network / non-minimal algorithms / flattened butterfly networks / generalized hypercube network / connections router / e-cube / 1K node network / router chip / cable connecting nearby routers / Direct networks / m 17mm×17mm chip / highradix routers / non-minimal oblivious algorithm / optical technology / conventional router / radix routers / interconnection network / radix router / size networks / interconnect network / Low-radix networks / router chips / oblivious and adaptive routing algorithms / butterfly networks / foldedClos network / 3stage network / interconnection networks / radix networks / direct network / conventional low-radix routers / 1K network / butterfly network / low-radix routers / adaptive routing algorithms / minimal algorithm / radix-k routers / implementation using high-radix routers / minimal adaptive algorithm / non-minimal adaptive algorithm / bandwidth router chips / lower cost network / larger hypercube networks / input-queued virtual channel router / be built using low-radix routers / /

NaturalFeature

VC channel / /

Organization

Router Cabinet / Stanford University / Computer Systems Organization / /

Person

MIN AD / Permission / MIN UGAL / MIN CLOS AD UGAL / /

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Position

Topology General / model / representative / /

ProgrammingLanguage

CLOS / /

ProvinceOrState

Wisconsin / California / /

SportsLeague

Stanford University / /

Technology

minimal algorithm / high-bandwidth router chips / non-minimal algorithms / radix-64 routers / VAL routing algorithm / input-queued routers / 1 connections router / cable connecting nearby routers / YARC router / radix-32 routers / conventional low-radix routers / router chips / conventional router / Routing algorithms / non-minimal adaptive algorithm / 3stage network using radix-64 routers / radix-k routers / high-radix router / radix-7 routers / SerDes technology / 3.1 Routing Algorithms / non-minimal oblivious algorithm / 1 routers / fiber optic / VLSI chips / 8 router / adaptive routing algorithms / CLOS AD routing algorithm / 4-ary 2-flat using radix-8 routers / minimal adaptive algorithm / high-radix routers / oblivious and adaptive routing algorithms / 15 15 15 Router / implementation using high-radix routers / simulation / 0.13µm 17mm×17mm chip / input-queued virtual channel router / router chip / 16 8 router / local router / low-radix routers / /

URL

www.boxfire.com / /

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