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Parallel computing / Central processing unit / Computer architecture / Instruction set architectures / Instruction set / SIMD / Program counter / ARM architecture / Processor register / General-purpose computing on graphics processing units / OpenMP
Date: 2014-02-11 01:12:49
Parallel computing
Central processing unit
Computer architecture
Instruction set architectures
Instruction set
SIMD
Program counter
ARM architecture
Processor register
General-purpose computing on graphics processing units
OpenMP

Analysis of Cross-layer Vulnerability to Variations: An Adaptive Instruction-level to Task-level Approach 1 Abbas Rahimi CSE, UC San Diego La Jolla, CA 92093, USA

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