| Document Date: 2007-07-18 13:24:29
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City Argonne / / Company ACM Press / Intel / A. Related Work Hardware / Argonne National Laboratory / / Currency pence / / / Facility SCSI port / I/O library / University of Chicago / Computation Institute / / IndustryTerm over such networks / multicore processors / secure protocols / event processing / security processing / bandwidth delay product / subsystem services / multi-core technology / multi-core processors / parallel security processing / software implementations / parallel processing power / multicore technology promises / Internet Protocol / generalpurpose hardware / higher processing power / software developer / co-processor / secure processing / parallel secure processing / / Organization Department of Computer Science / University of Chicago / Chicago / U.S. Securities and Exchange Commission / Computation Institute / / Position system administrator / asynchronous event model / the software developer / / ProvinceOrState Illinois / / Technology Encryption / GridFTP protocol / IP / Encryption protocols / Gigabit / multicore processors / parallel TCP protocols / operating system / 1 Harnessing Multicore Processors / SSL / existing network protocols / specific protocol / parallel processing / SCSI / network protocols / / URL http /
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1 Harnessing Multicore Processors for High Speed Secure Transfer John Bresnahan1,2,3, Rajkumar Kettimuthu1,2, Mike Link1,2, Ian Foster1,2,3 1