Randal Bryant

Results: 27



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1x86-64 Machine-Level Programming∗ Randal E. Bryant David R. O’Hallaron September 9, 2005  Intel’s IA32 instruction set architecture (ISA), colloquially known as “x86”, is the dominant instruction

x86-64 Machine-Level Programming∗ Randal E. Bryant David R. O’Hallaron September 9, 2005 Intel’s IA32 instruction set architecture (ISA), colloquially known as “x86”, is the dominant instruction

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Source URL: www.cs.cmu.edu

- Date: 2005-09-11 16:57:44
    2CS:APP2e Web Aside ASM:SSE: SSE-Based Support for Floating Point∗ Randal E. Bryant David R. O’Hallaron August 5, 2014

    CS:APP2e Web Aside ASM:SSE: SSE-Based Support for Floating Point∗ Randal E. Bryant David R. O’Hallaron August 5, 2014

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    Source URL: csapp.cs.cmu.edu

    - Date: 2014-08-05 12:50:10
      3CS:APP2e Web Aside ECF:GRAPHS: Process Graphs∗ Randal E. Bryant David R. O’Hallaron July 14, 2014

      CS:APP2e Web Aside ECF:GRAPHS: Process Graphs∗ Randal E. Bryant David R. O’Hallaron July 14, 2014

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      Source URL: csapp.cs.cmu.edu

      - Date: 2014-07-14 15:27:54
        4CS:APP3e Web Aside OPT:SIMD: Achieving Greater Parallelism with SIMD Instructions∗ Randal E. Bryant David R. O’Hallaron October 12, 2015

        CS:APP3e Web Aside OPT:SIMD: Achieving Greater Parallelism with SIMD Instructions∗ Randal E. Bryant David R. O’Hallaron October 12, 2015

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        Source URL: csapp.cs.cmu.edu

        - Date: 2015-10-12 15:32:40
          5CS:APP2e Web Aside ECF:SAFETY: Async-signal-safety∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

          CS:APP2e Web Aside ECF:SAFETY: Async-signal-safety∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

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          Source URL: csapp.cs.cmu.edu

          - Date: 2012-06-05 05:39:13
            6CS:APP2e Web Aside ARCH:HCL: HCL Descriptions of Y86 Processors∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

            CS:APP2e Web Aside ARCH:HCL: HCL Descriptions of Y86 Processors∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

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            Source URL: csapp.cs.cmu.edu

            - Date: 2012-06-05 05:37:01
              7x86-64 Machine-Level Programming∗ Randal E. Bryant David R. O’Hallaron September 9, 2005  Intel’s IA32 instruction set architecture (ISA), colloquially known as “x86”, is the dominant instruction

              x86-64 Machine-Level Programming∗ Randal E. Bryant David R. O’Hallaron September 9, 2005 Intel’s IA32 instruction set architecture (ISA), colloquially known as “x86”, is the dominant instruction

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              Source URL: tptp.cc

              - Date: 2013-08-27 07:52:46
                8CS:APP2e Web Aside ASM:X87: X87-Based Support for Floating Point∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

                CS:APP2e Web Aside ASM:X87: X87-Based Support for Floating Point∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

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                Source URL: csapp.cs.cmu.edu

                Language: English - Date: 2012-06-05 05:37:20
                9CS:APP Web Aside DATA:IA32-FP: Intel IA32 Floating-Point Arithmetic∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

                CS:APP Web Aside DATA:IA32-FP: Intel IA32 Floating-Point Arithmetic∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

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                Source URL: csapp.cs.cmu.edu

                Language: English - Date: 2012-06-05 05:37:36
                10Computer Systems A Programmer’s Perspective, Second Edition 1 Randal E. Bryant David R. O’Hallaron January 13, 2010

                Computer Systems A Programmer’s Perspective, Second Edition 1 Randal E. Bryant David R. O’Hallaron January 13, 2010

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                Source URL: csapp.cs.cmu.edu

                Language: English - Date: 2010-02-14 13:34:53