| Document Date: 2006-04-01 15:25:15
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City conventional queue / / Company Intel / / / Facility Computer Engineering University of Rochester / port Reject Addr Age Age / Store Queue / / IndustryTerm close-by store-to-load communications / normal processor / energy consumption / integer applications / associative search / out-of-order processor / bank / uniprocessor systems / baseline processor / out-of-order processors / floatingpoint applications / multi-core products / associative search logic / sequential applications / software analysis / energy penalties / energy / / MarketIndex SPEC CPU2000 / / Organization Michael Huang Department of Electrical / University of Rochester / / Person Alok Garg / Michael Huang / / Position model data values / Naive+WB / writer / integer scheduler / scheduler / WB / producer / / Product Pentium 4 processor / Pentium 4 / / ProgrammingLanguage FP / / Technology Alpha / one processor / Alpha21264 processor / out-of-order processor / 4 processor / Related Work Out-of-order processors / out-of-order processors / Cache Memory / simulation / flash / baseline processor / normal processor / /
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Slackened Memory Dependence Enforcement: Combining Opportunistic Forwarding with Decoupled Verification Alok Garg, M. Wasiur Rashid, and Michael Huang Department of Electrical & Computer Engineering University of Rochest