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MIPS architecture / Ring / Instruction set / Capability-based security / 64-bit / Hypervisor / Kernel / Reduced instruction set computing / Memory protection / Computer architecture / Central processing unit / Instruction set architectures


Capability Hardware Enhanced RISC Instructions: CHERI Instruction-set architecture
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Document Date: 2015-01-15 09:17:36


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City

Cambridge / /

Company

Air Force Research Laboratory / SRI International / AMD / Intel / Google Inc. / /

Facility

Cambridge Computer Laboratory / University of Cambridge / Air Force Research Laboratory / /

IndustryTerm

software flaws / software design / wireless mobile devices / open-source software stacks / capability systems / software bounds / explicit software multi-programming / software compartmentalization / hardware-software object-capability security model / web browsers / software implementations / compartmentalized software / sound and formally based processor / software components / mobile and embedded devices / software engineering practices / computer technology / high-risk software libraries / less critical software / mobile device systems / prototype hardware / open-source systems / realistic technology transition path / programmable hardware / hardware-software interfaces / software object-capability models / trustworthy systems / heterogeneous and distributed computing / gentle hardware-software adoption path / software bugs / capability-oriented software design / image processing / system hardware-software architecture / hardware-software architecture / software decomposition / software vulnerabilities / substantial software stacks / ground-up software-architecture / software architecture / software resilience / /

OperatingSystem

Linux / Android / FreeBSD / GNU / /

Organization

Defense Advanced Research Projects Agency / CHERI ISA / MIT / U.S. Government / CHERI Unit / University of Cambridge Computer Laboratory / University of Cambridge / Department of Defense / RISC / /

Person

Greg Morrisett Brian Randell Kenneth / Shahbaz Stacey Son Richard / Ben Laurie / Robert N. M. Watson / Mike Gordon Steven Hand Andrew Herbert Warren / Jeremy Epstein Virgil Gligor Li / Michael Roe / Robert Norton Colin Rothwell John / Jonathan Anderson / Brooks Davis / Alan Mujumdar Prashanth Mundkur Robert / Doug Maughan Greg Morrisett Brian / Stacey Son Richard Uhler Philip Withnall Bjoern / Simon Cooper Rance DeLong Jeremy Epstein Virgil / A. Hunt Jr. Doug Maughan / Wojciech Koszek Patrick Lincoln Anil / Kenneth F. Shotting Joe Stoy / Peter G. Neumann / Ruslan Bukin Gregory Chadwick Paul / Steven J. Murdoch / Patrick Lincoln Anil Madhavapeddy / David Chisnall / Tom Van Vleck Samuel / Muhammad Shahbaz Stacey Son / Robert Laddaga / Hans Petter Selasky Munraj Vadera / Warren A. Hunt Jr. / Lee Badger Simon Cooper Rance / John Rushby Hassen Saidi Muhammad / Andrew Moore Alan Mujumdar Prashanth / David Wheeler / Colin Rothwell John Rushby Hassen / Chris Kitching Ilias Marinos / Simon W. Moore / Nirav Dave Alex Horsman Chris Kitching Ilias / Paul J. Fox Khilan Gudka Jong / Samuel M. Weber / Howie Shrobe / Jong Hun Han Alexandre Joannou / Virgil Gligor Li Gong Mike Gordon / Jonathan Woodruff / Joe Stoy Tom Van Vleck / A. Theodore Markettos Ed Maste Andrew / Ross J. Anderson Ruslan Bukin Gregory / Asif Khan Myron King / /

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Position

program manager / professor / King / professor and past DARPA CRASH program manager / /

Product

C-0237 / Bluespec SystemVerilog / /

ProgrammingLanguage

Java / C / Hardware Description Language / /

Technology

FPGA / Virtual Machine / Linux / smart phones / Android / operating system / mobile device / image processing / operating systems / computer technology / mobile devices / Java / Open-Source Research Processor / virtual memory / /

URL

http /

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