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Company MFC / AMD / SCU / Intel / / Currency AMD / / IndustryTerm file applications / less cache capacity to some applications / multicore chips / fileintensive applications / software workloads / distinct data on-chip / file-reading applications / unmodified file-intensive applications / multicore chip / possible future hardware / multi-core processors / file-intensive applications / higher performance / explicit system call that allows applications / parallel software / memory systems / cache eviction algorithms / write-heavy applications / software techniques / static Web pages / time busy computing / unmodified file utilities / benchmark applications / off-chip / multicore processors / parallel applications / little time computing / Web servers / cache management / read-intensive file-system applications / data-intensive applications / cache replacement algorithm / data on-chip / graphics processor / commodity hardware / Web server / serial data-intensive applications / file utilities / read-heavy file system applications / cache coherence protocol / typical Web server / on-chip / cache placement algorithm / performance improvement in future processors / simulated future multicore chip / eviction hardware / multicore processor / / OperatingSystem Unix / Linux / L3 / / Person Robert Morris / Silas Boyd-Wickizer / / Position kernel scheduler / scheduler / memory controller / DRAM controller / / Product md5sum / Linux / Zipfian / / ProgrammingLanguage Java / C / Javascript / / Technology multicore processor / Multicore chips / Linux / Unix / cache replacement algorithm / cache eviction algorithms / API / cache memory / multicore processors / local chip / avoiding off-chip / four chips / Sharing on-chip / cache coherence protocol / same chip / Opteron chips / data on-chip / cache placement algorithm / load balancing / on-chip capacity Mon-chip / graphics processor / Java / distinct data on-chip / caching / multicore chip / Web server / /
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