The CHERI capability model: Revisiting RISC in an age of risk Jonathan Woodruff† Robert N. M. Watson† David Chisnall† Simon W. Moore† Jonathan Anderson† Brooks Davis‡ Ben Laurie§ Peter G. Neumann‡ Robert N

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Date: 2014-04-24 18:23:36 Computer memory Virtual memory Central processing unit Instruction set architectures Memory management Pointer Memory management unit MIPS architecture Memory protection Computer architecture Computing Computer hardware		The CHERI capability model: Revisiting RISC in an age of risk Jonathan Woodruff† Robert N. M. Watson† David Chisnall† Simon W. Moore† Jonathan Anderson† Brooks Davis‡ Ben Laurie§ Peter G. Neumann‡ Robert N Add to Reading List Source URL: www.cl.cam.ac.uk Download Document from Source Website File Size: 279,88 KB Share Document on Facebook

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