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Semiconductor devices / MOSFET / Electronic design / Threshold voltage / Field-effect transistor / Self-aligned gate / Depletion region / Gate oxide / Integrated circuits / Electronic engineering / Electrical engineering / Electromagnetism


Design of Ion-Implanted MOSFET’s with Very Small Physical Dimensions ROBERT H. DENNARD, MEMBER, IEEE, FRITZ H. GAENSSLEN, HWA-NIEN YU, MEMBER, IEEE,
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Document Date: 2007-02-15 15:58:51


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longchannel device / subsequent processing / n-channel devices / shorter devices / device devices / scaled-down device / channel implantation energy / larger devices / long channel-length devices / hypothetical device / high temperature processing steps / short devices / low energy / larger device / experimental devices / given integrated circuit chip / given chip / carrier point / given device / conventional and scaled-down devices / analytical tools / low-temperature chemical-vapor deposition / metal interconnection lines / long devices / short-channel devices / high energy / power-delay product / Intrinsic carrier concentration / scaled-down devices / optical projection printing / metal films / dynamic memory applications / much larger devices / test chip / turned-off device / square-law behavior / scaled-down micron devices / conventional device / circuit applications / /

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ERNEST BASSOUS / V. LEO RIDEOUT / HWA-NIEN YU / FRITZ H. GAENSSLEN / ROBERT H. DENNARD / ANDRE R. LEBLANC / ION-IMPLANTED MOSFET / /

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conductor / current transport model for various parameter conditions / /

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semiconductor / X-ray / given integrated circuit chip / Dielectric / lithography / simulation / given chip / integrated circuits / same chip / test chip / integrated circuit / /

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