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Distributed computing architecture / Computer memory / Cache coherency / Distributed shared memory / Shared memory / Cache coherence / Memory coherence / TreadMarks / CPU cache / Concurrent computing / Computing / Parallel computing


Bull. of the IEEE Technical Committee on Computer Architecture (TCCA), Mar[removed]Ecient Use of Memory-Mapped Network Interfaces for Shared Memory Computing Nikolaos Hardavellas, Galen C. Hunt, Sotiris Ioannidis, Robert
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Document Date: 2011-04-01 17:08:23

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File Size: 150,56 KB

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City

Rochester / Boston / Cambridge / /

Company

Remote-Memory-Access Networks / Digital Equipment Corporation / Shared Virtual Memory Systems / HIC Networks / HP / Coherent Shared-Memory Systems / Microsoft / /

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Event

Natural Disaster / FDA Phase / /

Facility

University of Utah / DEC Cambridge Research Lab University of Rochester One Kendall Sq. / University of Wisconsin / /

IndustryTerm

software handler / network technology / workstation networks / 21064A processor / multi-writer protocol / message-passing networks / directory protocol / virtual memory hardware / message-passing network / remote memory access networks / sequentially-consistent protocol / remote processor / software coherence system / cachecoherent systems / multi-writer protocols / software coherence / interval-based multi-writer protocol / relaxed consistency protocol / processors computing / multi-writer interval-based protocol / shared memory computing / commodity network / lazy processing / /

NaturalFeature

Memory Channel / DEC Memory Channel / /

OperatingSystem

Sequent / Digital Unix / /

Organization

Michael L. Scott Department of Computer Science / National Science Foundation / IEEE Technical Committee on Computer Architecture / University of Rochester / University of Utah / University of Wisconsin / /

Person

Kai Li / Michael L. Scott / Encore / Robert Stets / Leonidas Kontothanassisy / Galen C. Hunt / /

Position

Single Writer and Multiple Writer / D. J. / /

Product

21064A processor / 21064A / L1 / /

ProgrammingLanguage

TSP / /

ProvinceOrState

Wisconsin / New York / Utah / Manitoba / Massachusetts / /

Technology

shared memory system / modifying processor / much less aggressive / sequentially-consistent protocol / sharing processors / Unix / Cashmere protocol / Shasta protocol / Software DSM Protocols / TreadMarks protocol / multi-writer interval-based protocol / Shared Memory / 21064A processor / VM-based protocol / Operating Systems / multi-writer protocol / Multi-writer protocols / one processor / relaxed consistency protocol / interval-based multi-writer protocol / DSM protocols / virtual memory system / synchronizing processors / simulation / virtual memory / sequential consistency / 32 processors / remote processor / network technology / Parallel Processing / directory protocol / /

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