Verification Using SAT and SMT Solvers1 N. Shankar Computer Science Laboratory SRI International Menlo Park, CA

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Date: 2010-08-25 09:00:40 Theoretical computer science Mathematical logic Mathematics Boolean algebra Logic in computer science Electronic design automation Formal methods NP-complete problems Boolean satisfiability problem Satisfiability modulo theories Propositional calculus Model checking		Verification Using SAT and SMT Solvers1 N. Shankar Computer Science Laboratory SRI International Menlo Park, CA Add to Reading List Source URL: dream.inf.ed.ac.uk Download Document from Source Website File Size: 422,21 KB Share Document on Facebook

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