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Computer programming / Message Passing Interface / OpenMP / SPMD / Multi-core processor / Altix / Thread / Computer cluster / Standard Performance Evaluation Corporation / Computing / Concurrent computing / Parallel computing


High Performance Computing Using MPI and OpenMP on Multi-core Parallel Systems Haoqiang Jin, Dennis Jespersen, Piyush Mehrotra, Rupak Biswas NAS Division, NASA Ames Research Center, Moffett Field, CALei Huang, Bar
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Document Date: 2011-02-17 02:46:14


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File Size: 216,82 KB

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City

Harpertown / Nehalem / /

Company

IBM / Computer Sciences / Intel / /

Country

Columbia / /

Currency

pence / /

Event

Reorganization / /

Facility

MPI library / University of Houston / IBM POE library / SGI’s MPI library / SGI MPT library / /

IndustryTerm

performance computing / realistic aerospace configurations / shared memory systems / large parallel systems / exascale systems / software side / multi-core based systems / real-world large-scale applications / turbine machinery application / distributed memory systems / multi-core chips / multi-core systems / parallel systems / bin-packing algorithm / cluster systems / real-world applications / benchmark applications / parallel applications / hybrid applications / multi-core parallel systems / computing / numerical algorithm / commodity microprocessor chips / /

OperatingSystem

L3 / AIX / /

Organization

University of Houston / Houston / Rupak Biswas NAS Division / NASA Ames Research Center / National Aeronautics and Space Administration / Barbara Chapman Department of Computer Sciences / /

Person

Dennis Jespersen / Barbara Chapman / /

Position

model / global data / memory controller / /

Product

XLF-10.1 IBM POE-4.3 Pleiades (Nehalem) / Power5+ / /

ProgrammingLanguage

Fortran / /

ProvinceOrState

Texas / California / /

Technology

Power5+ chip / Itanium2 chip / API / Fluid Dynamics / Operating System / shared memory / Power5+ processors / Xeon processors / Nehalem processor / Xeon NehalemEP chip / bin-packing algorithm / load balancing / commodity microprocessor chips / numerical algorithm / Itanium2 processors / Power5+ processor / /

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