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61	LOT-ECC: LOcalized and Tiered Reliability Mechanisms for Commodity Memory Systems ∗ Aniruddha N. Udipi† † Naveen Muralimanohar‡ Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2012-07-05 23:25:37 Digital media Chipkill Dynamic random-access memory RAM parity Soft error DIMM CPU cache Error detection and correction DDR3 SDRAM Computer memory Computer hardware Computing
62	Staged Reads : Mitigating the Impact of DRAM Writes on DRAM Reads ∗ Niladrish Chatterjee University of Utah Naveen Muralimanohar Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2012-01-10 00:00:20 Dynamic random-access memory CPU cache Random-access memory Write buffer Memory controller CAS latency Memory hierarchy DDR3 SDRAM RLDRAM Computer memory Computer hardware Computing
63	Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access ∗ Niladrish Chatterjee‡ ‡ University Manjunath Shevgoor‡ Rajeev Balasubramonian‡ Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2012-11-05 13:54:51 Digital media DDR3 SDRAM DIMM Synchronous dynamic random-access memory Dynamic random-access memory DDR SDRAM CAS latency DDR2 SDRAM Prefetch buffer Computer memory Computer hardware Computing
64	Volume 1, Issue 2 July 2008 \| INNOVENTIONS, Inc. \| INNOVENTIONS Update Introducing RAMCHECK LX Add to Reading List Source URL: www.memorytesters.com Language: English - Date: 2008-07-17 16:15:06 DIMM Serial presence detect Memory tester Information Electronics SDRAM Computer memory DDR2 SDRAM
65	MemZip: Exploring Unconventional Benefits from Memory Compression ∗ Ali Shafiee Meysam Taassori Rajeev Balasubramonian University of Utah Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2014-01-10 15:50:12 CPU cache Dynamic random-access memory Memory bandwidth DDR3 SDRAM UltraSPARC III Data structure alignment CAS latency POWER1 Random-access memory Computer memory Computer hardware Computing
66	Managing DRAM Latency Divergence in Irregular GPGPU Applications Niladrish Chatterjee∗†§ , Mike O’Connor†k§ , Gabriel H. Loh‡, Nuwan Jayasena‡ and Rajeev Balasubramonian∗ ∗ University of Utah † NVIDI Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2014-08-15 10:13:33 Dynamic random-access memory Scheduling CAS latency Memory controller Latency SDRAM latency GDDR5 CPU cache Random-access memory Computer memory Computer hardware Computing
67	SCC External Architecture Specification (EAS) Revision 1.1 Please read the SCC Documentation Disclaimer on the next page. Intel Labs solicits and appreciates feedback. If you have comments about this documentation, pleas Add to Reading List Source URL: communities.intel.com Language: English - Date: 2015-04-07 19:41:27 Cloud computing Single-chip Cloud Computer Parallel computing Intel Nehalem P5 DDR3 SDRAM Multi-core processor CPU cache Computer hardware Computing Microprocessors
68	Quantifying the Relationship between the Power Delivery Network and Architectural Policies in a 3D-Stacked Memory Device Manjunath Shevgoor Jung-Sik Kim Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2013-11-01 14:03:29 Computing Dynamic random-access memory DDR3 SDRAM Memory controller Power network design Three-dimensional integrated circuit DIMM Random-access memory DDR4 SDRAM Computer memory Computer hardware Digital media
69	December 2007 \| INNOVENTIONS, Inc. \| Volume 1, Issue 1] INNOVENTIONS Update Add to Reading List Source URL: www.memorytesters.com Language: English - Date: 2007-12-05 18:26:37 Computing DIMM DDR3 SDRAM Synchronous dynamic random-access memory Dynamic random-access memory DDR2 SDRAM DDR SDRAM Computer hardware SDRAM Computer memory
70	» pITX-E38 « Ultrasmall 2.5" Pico-ITX board with Intel® Atom™ E38XX System on Chip (SoC) » Intel® Atom™ E38xx SoC (1, 2 or 4 cores), TDP: 5-10W » SO-DIMM Socket DDR3L-1333 Memory (up to 8GB) Add to Reading List Source URL: www.dpie.com Language: English - Date: 2014-03-04 04:58:49 SDRAM Intel Pico-ITX Serial ATA Nvidia Ion Low-voltage differential signaling PCI Express Computer hardware Computer buses DDR3 SDRAM

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