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X86 architecture / Virtual memory / Central processing unit / Computer memory / Thread / Interrupt handler / Interrupt / CPU cache / MIPS architecture / Computer architecture / Computing / Interrupts


SMP Implementation for OpenBSD/sgi Takuya ASADA Abstract We started to implement SMP support for the
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Document Date: 2010-05-17 03:45:27

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City

Coimbra / /

Company

CPU A / MPCONF MPCONF / IPL / As / OpenBSD / /

Country

Portugal / /

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Facility

TX port / /

IndustryTerm

clock information per-processor / boot secondary processors / target processors / active processors / per-processor / secondary processor / target device / controller device / output per-processor / bank / secondary processors / typical hardware / printing code / memory management / /

OperatingSystem

Linux / IRIX / OpenBSD / FreeBSD / NetBSD / BSD / /

Person

SCACHESZ FANLOADS LAUNCH RNDVZ STACKADDR / Naoki Hamada / SCACHESZ FANLOADS LAUNCH RNDVZ / Joel Sing / Miod Vallat / /

Position

Prime Minister / mp / serial driver / RACER / clock driver / Scheduler Processors The OpenBSD scheduler / MAGIC PRID PHYSID VIRTID MP / scheduler / controller / /

ProgrammingLanguage

FP / L / /

Technology

alpha / four processors / locked processor / shot processor / Linux / two processors / JTAG / two conflicting processors / 2.3 Scheduler Processors / second processor / Audio board / same processor / operating system / shared memory / output per-processor / one processor / target processors / boot secondary processors / 4.12 Per-processor / secondary processor / two R10000 processors / clock information per-processor / 3D Graphics / SDRAM / blocked processor / SCSI / local processor / /

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http /

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