Sun Microsystems / Informix Software Inc. / TPC-C / Silicon Graphics / Hitachi / LG Semiconductor / Donaldson / Intel / Microsoft / Cray Research / Sybase / Lucent Technologies / /
Country
Spain / / /
Facility
Reservation Station / Store Data Store Load Addr / Resource stalls / stall CPI / Fetch Unit IN-ORDER Up Sequencer SECTION Reservation Station / Soda Hall / Walter E. Baker# *Computer Science Division University of California at Berkeley / /
IndustryTerm
given processor / experimental infrastructure / parallel computing market / branch prediction algorithms / active processors / software runs / out-of-order processors / 21164based server / Online Dynamic Server / transaction processing database workloads / database server / configured systems / server applications / online transaction processing / cache coherence protocol / /
MarketIndex
OLTP / case 10 / /
OperatingSystem
Windows NT 4.0 / /
Organization
University of California / GB Memory / Transaction Processing Council’s TPC / Transaction Processing Council / /
Person
Kimberly Keeton / David A. Patterson / Yong Qiang He / Kim Keeton / Roger C. Raphael / Walter E. Baker / /
Position
RAT RRF Simple Decoder General / exec. / representative / forward / controller / /
Product
Pentium Pro processor / Pentium Pro / /
ProvinceOrState
Manitoba / California / /
Technology
Alpha / branch prediction algorithms / symmetric multiprocessing / Pentium Pro processor / four processors / given processor / out-of-order processors / 4 5 Processor / random access / operating system / active processors / four-state MESI cache coherence protocol / simpler three-state protocol / 200 MHz Pentium Pro processors / caching / Simulation / 3 Characteristic Base System Processor / SCSI / /
Performance Characterization of a Quad Pentium Pro SMP Using OLTP Workloads1 Kimberly Keeton*, David A. Patterson*, Yong Qiang He+, Roger C. Raphael+, and Walter E. Baker# *Computer Science Division