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Stream ciphers / Field-programmable gate array / Cryptanalysis / Xilinx / Key size / A5/1 / SciEngines GmbH / Data Encryption Standard / Cryptography / Reconfigurable computing / Brute-force attack


Cryptanalysis with a cost-optimized FPGA cluster Jan Pelzl, Horst Görtz Institute for IT-Security, Germany UCLA IPAM Workshop IV
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Document Date: 2006-12-06 10:54:32


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File Size: 1,29 MB

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Company

UCLA IPAM Workshop IV Special Purpose Hardware / AES / Xilinx / /

Currency

EUR / /

Facility

Horst Görtz Institute / University of Bochum / University of Kiel / /

IndustryTerm

computing / parallel computing architectures / retail / /

Organization

Horst Görtz Institute for IT-Security / UCLA / Horst Görtz Institute / ASIC / University of Bochum / University of Kiel / /

Person

Jean-Jacques Quisquater / Christian Schleiffer / Christof Paar / François-Xavier Standaert / Manfred Schimmler / Tim Güneysu / /

Position

General / /

Technology

FPGA / Cryptography / ASIC / Integrated Circuits / /

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