First Page | Meta Content | |
---|---|---|
![]() | Document Date: 2010-06-12 12:36:39Open Document File Size: 554,77 KBShare Result on FacebookCompanyQualcomm / Computer Laboratory / / /FacilityUniversity College London / University of Porto / University of Cambridge / /IndustryTermbroadband services / space-time processor / process technology / sub-carrier / data-rate applications / end product / fixed wireless access systems / broadband fixed wireless access systems / high data-rate communications / wireless access / maximum-likelihood solutions / computational processing / antenna systems / space-time processing block / energy / /OrganizationUniversity College London / University of Porto / Department of Electronics and Electrical Engineering / /PositionµPM / path metric memory µPM / designer / /ProgrammingLanguageVerilog / L / /TechnologyCMOS process technology / Broadband / Viterbi decoding algorithm / Verilog / wireless access / Viterbi algorithm / targeted 0.35-µm CMOS process technology / decoding algorithm / amplitude modulation / space-time processor / 5 The Viterbi algorithm / process technology / broadband fixed wireless / /SocialTag |