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Synopsys / Signoff / Static timing analysis / Electronic engineering / Electronic design automation / Automatic test pattern generation


Success Story Synopsys and STMicroelectronics TetraMAX Small Delay Defect ATPG Boosts Test Quality at STMicroelectronics
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Document Date: 2014-11-07 14:32:25

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Company

CAD and Design Solutions / Synopsys Inc. / STMicroelectronics / Front-End Technology Manufacturing / Digital Test Solutions / SDD Central CAD & Design Solutions / Philippe Magarshack Group / /

Country

United States / /

Event

Product Issues / Reorganization / /

Facility

Static bridge / Dynamic bridge / /

IndustryTerm

defacto signoff solution / semiconductor solutions / manufacturing test / microelectronics applications / subtle manufacturing defects / manufacturing processes / manufacturing tests / /

Person

Roberto Mattiuzzo / /

Position

Design Solutions General Manager / Manager / general manager / Vice President / General Manager / STMicroelectronics Business Overview STMicroelectronics / /

Product

parts per million / /

Technology

semiconductor / SDD ATPG technology / timing-aware technology / /

URL

www.synopsys.com / http /

SocialTag