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Altera / Electronics / Synchronous dynamic random-access memory / SiliconBlue Technologies / Actel / Fabless semiconductor companies / Electronic engineering / Field-programmable gate array


TECHNICAL BRIEF: MAX 10 FPGAs How to Design for Increasing Power Constraints
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Document Date: 2014-09-17 22:57:52

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File Size: 411,70 KB

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City

San Jose / /

Company

Altera Corporation / MAX 10 FPGAs / Altera International Ltd. / /

Country

United States / /

IndustryTerm

power conscious applications / direct electricity costs / facility real estate / computing / low energy on-die signaling / selected global clock networks / process technology / energy inter-device / clock networks / energy / /

Organization

U.S. Patent and Trademark Office / /

/

Position

system designer / Power Management Controller / sales representative / WAKE Pin Gated Clock Power Management Controller / /

Product

Estimator / /

ProvinceOrState

California / /

Technology

FPGA / SDRAM / flash memory / process technology / /

URL

www.altera.co.jp / www.altera.com/legal / www.altera.com/literature/wp/wp-01016.pdf / www.altera.com/max10 / www.altera.com/literature/wp/wp-01112-hw-reduce-power.pdf / www.altera.com / /

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