![Nios II / Field-programmable gate array / Altera / Sopc builder / Joint Test Action Group / Nios embedded processor / Embedded system / National Institute of Open Schooling / Booting / Electronic engineering / Electronics / Software Nios II / Field-programmable gate array / Altera / Sopc builder / Joint Test Action Group / Nios embedded processor / Embedded system / National Institute of Open Schooling / Booting / Electronic engineering / Electronics / Software](https://www.pdfsearch.io/img/a7e07cb4aa4bce48a8528fa5c96ef5cd.jpg)
| Document Date: 2008-11-03 02:09:12 Open Document File Size: 319,69 KBShare Result on Facebook
Company Joint Test Action Group / Altera Corporation / PLL System ID Tristate Bridge Remote Update / / Event Natural Disaster / / Facility Factory Image The nios2-terminal / Factory Image Button2 / /compact_config/ factory / Factory Image / / IndustryTerm family devices / printing commands / error processing functionality / utilities directory / software version / configuration device / software code / error processing / software programming model / software designs / software execution / software program / software app / example software uses / software project / / OperatingSystem Microsoft Windows / / Organization US Federal Reserve / / Person PIO LED PIO ADDR / Push Button / / Position external controller / remote update controller / Controller CFI Flash Controller / flash controller / reduced device driver / external configuration controller / intelligent controller / controller / / Product UART Nios II/e Core On-chip Memory / UART Nios II/e Core / / RadioStation Core / / Technology FPGA / Ethernet / RAM / flash memory / SRAM / Nios II/e processor / flash / UART / / URL www.altera.com/support/examples/download/compact_config.zip / /
SocialTag |