Appears in the proceedings of the 34th International Symposium on Microarchitecture (MICRO), Dec. 3-Dec. 5, 2001, Austin, Texas. Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution Ravi Rajwar a

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Date: 2001-10-10 12:33:46 Concurrency control Computing Computer architecture Test-and-set Transactional memory Non-blocking algorithm Synchronization Monitor Lock Linearizability Consistency model CPU cache		Appears in the proceedings of the 34th International Symposium on Microarchitecture (MICRO), Dec. 3-Dec. 5, 2001, Austin, Texas. Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution Ravi Rajwar a Add to Reading List Source URL: pages.cs.wisc.edu Download Document from Source Website File Size: 159,22 KB Share Document on Facebook

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