<--- Back to Details
First PageDocument Content
MOV / CPUID / Computing / JMP / X86 assembly language / X86 instructions / X86 architecture / Assembly languages
Date: 2009-05-17 13:10:53
MOV
CPUID
Computing
JMP
X86 assembly language
X86 instructions
X86 architecture
Assembly languages

Microsoft Word - starforce_yates.rtf

Add to Reading List

Source URL: www.reteam.org

Download Document from Source Website

File Size: 59,13 KB

Share Document on Facebook

Similar Documents

x86-64 Machine-Level Programming∗ Randal E. Bryant David R. O’Hallaron September 9, 2005 Intel’s IA32 instruction set architecture (ISA), colloquially known as “x86”, is the dominant instruction

DocID: 1toW9 - View Document

x86-64 Machine-Level Programming∗ Randal E. Bryant David R. O’Hallaron September 9, 2005 Intel’s IA32 instruction set architecture (ISA), colloquially known as “x86”, is the dominant instruction

DocID: 1rBoh - View Document

System V Application Binary Interface x86-64TM Architecture Processor Supplement Draft Version 0.21 Edited by Jan Hubicka , Andreas Jaeger2 , Mark Mitchell3 1

DocID: 1ryr4 - View Document

Computer architecture / Computing / Computer engineering / Stack machines / Central processing unit / Instruction set architectures / X86 architecture / Floating point / X87 / Stack / Processor register / X86

CS:APP2e Web Aside ASM:X87: X87-Based Support for Floating Point∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

DocID: 1ru2k - View Document

Computer architecture / Computing / Computer arithmetic / Computer engineering / Extended precision / Long double / Processor register / X87 / 64-bit computing / Double-precision floating-point format / X86 / IEEE floating point

CS:APP Web Aside DATA:IA32-FP: Intel IA32 Floating-Point Arithmetic∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

DocID: 1rpCG - View Document