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![]() | Document Date: 2003-01-08 23:21:54Open Document File Size: 381,12 KBShare Result on FacebookCompanyCadence / Synopsys / Mentor Graphics / Synplicity / HP / Altera Corporation / Viewlogic / /FacilityLibrary Mapping Files / /IndustryTermdesign processing / final product / waveform synthesis algorithms / software supports multiple device families / interfaces to tools / software processes / asychronous communications / verification tools / design entry tools / software runs / software interfaces / accessible on-line documentation / software supports multiple levels / programmable communications / digital signal processing / energy / /OperatingSystemWindows NT / Windows 95 / /OrganizationEDA / /PersonCadence Mentor Graphics Synopsys Viewlogic / /PositionSymbol Editor / Graphic Editor / designer / appropriate editor for each design file / Text Editor / Floorplan Editor / Waveform Editor / Software Data Sheet The Waveform Editor / controller / Microperipheral library Programmable DMA controller / /ProductMAX+PLUS II / /ProgrammingLanguageVerilog / Hardware Description Language / /PublishedMediumthe LPM Quick Reference Guide / /Technologydesign verification / Verilog / Message Processor / simulation / waveform synthesis algorithms / AHDL / DSP / VHDL / UART / /URLhttp /SocialTag |