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Central processing unit / Ring / Field-programmable gate array / Kernel / Operating system / Server / Embedded system / Reconfigurable computing / Algorithm / Computing / System software / Computer architecture


Uniform Execution Environment for Dynamic Reconfiguration T. Bapty, J. Scott, S. Neema, and J. Sztipanovits Vanderbilt University / Institute for Software Integrated Systems Department of Electrical and Computer Engineer
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Document Date: 2008-06-18 14:29:50


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File Size: 57,12 KB

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City

Boston / Lauderdale / Greenbelt / /

Company

OS Consistency Software / Self-Adaptive Software / IEEE Software / Adaptive Computing Systems / Software Integrated Systems / /

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Facility

Carnegie Mellon University / J. Sztipanovits Vanderbilt University / /

IndustryTerm

hardware processing elements / reconfigurable computing systems / embedded systems / separate processing structures / cooperative network / embedded applications / software implementations / storage device / feasible hardware/software architectures / configurable hardware / hardware/software implementations / post processing / Software workers / set design solutions / state-of-theart technology / signal processing / hardware device / external device / direct device / portable real-time kernel / external hardware device / real-time constraints / real-time signal processing systems / reconfigurable systems / software function / purpose computing devices / Communications interfaces / software communications / intermediate algorithms / technology migration efforts / heterogeneous computing platform / Software-programmable components / microprocessor devices / design/runtime infrastructure / direct-implementation hardware / reconfigurable hardware / programmable logic devices / highperformance solution / arbitrary hardware / processing algorithms / communications maps / software resources / software processes / given algorithm / Communications elements / software environment / level design/requirements capture tools / design search / closed-loop systems / fixedfunction devices / computing / target systems / configurable device / memory management / execution infrastructure / /

Organization

Republican Party / School of Computer Science / ASIC / United States Army / Vanderbilt University / Carnegie Mellon University / National Aeronautics and Space Administration / Software Integrated Systems Department of Electrical and Computer Engineering / Institute for Software Integrated Systems / /

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Position

high-level designer / designer / Comm Asynchronous Communication Buffer Worker / Configuration Manager / scheduler / engineer /physicist / Port Contention Device Token Loss/Duplication Controller / /

ProgrammingLanguage

C / /

ProvinceOrState

Maryland / Florida / Massachusetts / /

PublishedMedium

IEEE Software / /

Technology

FPGA / DSP processors / operating systems / processing algorithm / VHDL / processing algorithms / ASIC / enabling technology / resulting algorithm / RISC/CISC processors / given algorithm / conventional RISC/CISC processors / attached processor / intermediate algorithms / simulation / state-of-theart technology / DSP / Digital Signal Processors / /

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