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Integrated circuits / Field-programmable gate array / Place and route / Application-specific integrated circuit / Gate array / Lookup table / Placement / Standard cell / Routing / Electronic engineering / Electronic design automation / Electronics


An Architectural Exploration of Via Patterned Gate Arrays Chetan Patel, Anthony Cozzie, Herman Schmit, Larry Pileggi Carnegie Mellon University 5000 Forbes Ave Pittsburgh, PA 15213
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Document Date: 2010-06-10 18:45:37

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File Size: 2,78 MB

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City

Monterey / Using Cluster / /

Company

Microelectronic Advanced Research Corporation / /

Continent

Europe / /

Country

United States / /

Currency

USD / /

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Facility

Larry Pileggi Carnegie Mellon University / /

IndustryTerm

µm technology / metal wires / adjacent metal layers / upper metal layer / metal wire / user-programmable devices / horizontal and vertical metal / regular device / metal tracks / metal line / manufacturing / metal layers / metal lines / manufacturing process / µm technology library / /

MarketIndex

MCNC / /

Organization

ASIC / CMU Center for Silicon System Implementation / Carnegie Mellon University / Gigascale Silicon Research Center / /

Person

Vikas Chandra / C. Patel / V / Aneesh Koorapty / A. Koorapty / V / Anthony Cozzie / Larry Pileggi Carnegie / /

ProvinceOrState

California / /

Technology

FPGA / ASIC / 0.13 µm technology / SRAM / Integrated Circuits / Integrated Circuit / CAD / /

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