Synthesis of Low Power CED Circuits Based on Parity Codes Shalini Ghosh1, Sugato Basu2, and Nur A. Touba1 1 Dept. of Electrical and Computer Engineering, University of Texas, Austin, TX 78712 - Texas Power - Document - PDFSEARCH.IO

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	Synthesis of Low Power CED Circuits Based on Parity Codes Shalini Ghosh1, Sugato Basu2, and Nur A. Touba1 1 Dept. of Electrical and Computer Engineering, University of Texas, Austin, TX 78712 Add to Reading List Document Date: 2006-08-14 01:36:49 Open Document File Size: 166,12 KB Share Result on Facebook

Synthesis of Low Power CED Circuits Based on Parity Codes Shalini Ghosh1, Sugato Basu2, and Nur A. Touba1 1 Dept. of Electrical and Computer Engineering, University of Texas, Austin, TX 78712Add to Reading List