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Parallel computing / Intel Threading Building Blocks / Multi-core processor / Parallel programming model / Implicit parallelism / Automatic parallelization / Thread / Instruction-level parallelism / Explicit parallelism / Computing / Concurrent computing / Computer programming


HSR – University of Applied Sciences Rapperswil Institute for Software Parallator Transformation towards C++ parallelism using TBB
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Document Date: 2013-06-11 03:39:11

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File Size: 2,74 MB

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Company

Intel / /

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Facility

University of Applied Sciences Rapperswil Institute / /

IndustryTerm

parallel algorithm / desktop applications / multi-core processor / parallel hardware / multi-core processors / uniprocessor systems / tree pattern matching algorithm / /

Organization

University of Applied Sciences Rapperswil Institute for Software Parallator Transformation / /

Person

Peter Sommerlad / Martin Kempf / /

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Position

Parallel Advisor / programmer / /

ProgrammingLanguage

C++ / /

Technology

parallel algorithm / TBB Parallel Algorithms / STL Algorithms / one processor / tree pattern matching algorithm / shared memory / operating systems / same chip / corresponding TBB algorithm / Divide-and-Conquer Algorithms / /

URL

http /

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