synchronous and timed systems / timed tasks processing events / synthesizable hardware / synchronous systems / model-checking tools / application software / distributed embedded systems / compositional modeling tool / hybrid systems / cartesian product / /
OperatingSystem
Linux / POSIX / /
Organization
Department of Information Technology / Uppsala University / IEEE Computer Society / /
Person
Proc / Sn Sm Sr / Joseph Sifakis Verimag / Marius Bozga / /
Position
associated guard / guard / standard model for most multithreaded software / Scheduler / foundation model for components and their composition / controller / /
ProgrammingLanguage
Java / C / C++ / /
PublishedMedium
Theoretical Computer Science / /
RadioStation
FM 2006 / /
TVStation
WCET / /
Technology
MPEG / Java / Linux / Information Technology / Eclipse EMF technology / Operating System / /
Modeling Heterogeneous Real-time Components in BIP Ananda Basu, Marius Bozga and Joseph Sifakis Verimag, 38610 Gieres, France {basu, bozga, sifakis}@imag.fr Abstract We present a methodology for modeling heterogeneous