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Machine code / Central processing unit / Transport triggered architecture / Assembly languages / Register file / Operand / Instruction set / Tomasulo algorithm / Addressing mode / Computer architecture / Computer engineering / Computer hardware


Document Date: 2009-02-17 14:10:38

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File Size: 126,67 KB

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Company

IBM / /

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Facility

Transport Triggered Architectures Jan Hoogerbrugge Henk Corporaal Delft University of Technology Department / /

IndustryTerm

interconnection network / code generation software / scalar applications / realistic applications / intermediate product / code generation tools / superscalar processors / /

OperatingSystem

GNU / /

Organization

GPRF / Delft University of Technology Department of Electrical Engineering Section Computer Architecture / /

Person

Jan Hoogerbrugge Henk Corporaal / /

Position

scheduler / extended basic block scheduler / parameterized extended basic block scheduler / /

ProgrammingLanguage

FP / C / C++ / /

Technology

Tomasulo algorithm / Cydrome VLIW processor / However superscalar processors / /

SocialTag