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Document Date: 2013-01-30 07:37:57Open Document File Size: 726,43 KBShare Result on FacebookCompanyIPL / /CountryPoland / /Currencypence / / /FacilityDCD’s headquarters / / /IndustryTermoff-chip / memory chip / synchronous serial peripheral devices / real time debugging / real-time hardware debugger / interprocessor communications / external devices / manufactured chips / bank / low power applications / serial peripheral devices / data memory chip / power critical applications / included standard software interface / multi-master systems / software upsets / on-chip / /OperatingSystemUnix / POSIX / /OrganizationMDU32 Multiply Divide Unit / Compare/Capture Unit / Power Management Unit / Watchdog Timer SPI Unit / DRTC Compare Capture UART1 Master/ Slave I2C Unit Control Unit / SPI Unit / DoCD™ Debug Unit / Arithmetic Logic Unit / Advanced Power Management Unit / Slave I2C Unit / Master I2C Unit / Multiply Divide Unit / UART0 Timers IO PORTS DoCD Debugger Floating Point Unit / Capture Unit / EDATA Memory Interface Program Memory Interface IDATA Memory Interface Control Unit / Floating Point Unit / / /Positionsystem clock frequencies Interrupt generation I2C bus controller / stop pmm Interrupt controller / variable baud rate I2C bus controller / Master I2C Bus Controller / I2C controller / Ethernet controller / Controller / device controller / /ProgrammingLanguageVERILOG / C / /ProvinceOrStateManitoba / /RadioStationCore / Wait / /TechnologyFPGA / Ethernet / Full-duplex / RAM / Floating Point Unit / VERILOG / CORDIC algorithm / flow control / Unix / Extended data memory chip / JTAG / simulation / Internal RAM memory chip / VHDL / /URLhttp /SocialTag |