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Results: 1471

#	Item
1	A Story of Parametric Trace Slicing, Garbage and Static Analysis Giles Reger School of Computer Science, University of Manchester, UK PrePost 2017 Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2017-09-19 11:02:58 I1 Garbage collection
2	A Pattern-Based Approach to Parametric Specification Mining Giles Reger, Howard Barringer, and David Rydeheard University of Manchester, UK Abstract. This paper presents a technique for mining parametric temporal specifi Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2016-07-20 12:50:31 Logic Symbol Substitution Mathematical logic Finite automata
3	Cooperating Proof Attempts Giles Reger, Dmitry Tishkovsky, and Andrei Voronkov ? University of Manchester, Manchester, UK Abstract. This paper introduces a pseudo-concurrent architecture for first-order saturation-based Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2016-07-20 13:24:09 Formal methods Theoretical computer science Complexity classes Automated theorem proving Vampire NP IP Mathematics Constraint programming Proof compression
4	AVATAR Modulo Theories Nikolaj Bjøner1 Giles Reger2 Martin Suda3 Andrei Voronkov2,4,5 1 Microsoft Research, Redmond, USA University of Manchester, Manchester, UK Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2016-10-06 05:17:59 Theoretical computer science Logic Mathematical logic Logic in computer science Artificial intelligence Automated reasoning Automated theorem proving Predicate logic Quantifier Andrei Voronkov Z3 Alt-Ergo
5	Considering Typestate Verification for Quantified Event Automata Giles Reger University of Manchester, Manchester, UK ISoLa 2016 – Corfu, October 13, 2016 Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2016-10-13 07:25:34 Program analysis Typestate analysis
6	Instantiation for Theory Reasoning in Vampire Giles Reger Martin Riener University of Manchester, Manchester, UK Add to Reading List Source URL: www.logic.at Language: English - Date: 2018-07-19 05:32:19 Logic Mathematical logic Theoretical computer science Automated theorem proving Logic in computer science Formal methods Logic programming Propositional calculus Resolution Unification Satisfiability modulo theories Literal
7	Finding Finite Models in Multi-Sorted First-Order Logic? Giles Reger1 , Martin Suda1 , and Andrei Voronkov1,2,University of Manchester, Manchester, UK Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2016-07-20 16:49:46 Mathematics Mathematical logic Logic Model theory Logic in computer science Semantics Universal algebra Boolean satisfiability problem Interpretation First-order logic Resolution Clause
8	Checkable Proofs for First-Order Theorem Proving Giles Reger1 , Martin Suda2 1 School of Computer Science, University of Manchester, UK 2 TU Wien, Vienna, Austria Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2017-08-08 03:28:45 Software Automated theorem proving Theoretical computer science Formal methods TPTP Proof assistant Frama-C Theorem prover E theorem prover Theorem Isabelle
9	From First-order Temporal Logic to Parametric Trace Slicing Giles Reger and David Rydeheard University of Manchester, Manchester, UK Abstract. Parametric runtime verification is the process of verifying properties of ex Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2016-07-20 12:50:18 Temporal logic Formal languages Logic Metalogic Mathematical logic Linear temporal logic Mathematics Model theory Symbol Computation tree logic Interpretation Well-formed formula
10	Considering Typestate Verification for Quantified Event Automata Giles Reger University of Manchester, Manchester, UK Abstract. This paper discusses how the existing static analyses developed for Add to Reading List Source URL: www.cs.man.ac.uk Language: English - Date: 2016-08-10 12:12:08 Program analysis Typestate analysis Mathematical logic Logic Mathematics Runtime verification Quantifier Type system Sheaf

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