Back to Results
First PageMeta Content
Information / Conventional PCI / Transmission Control Protocol / Communications protocol / Computing / Data / Computer buses


Automated Interface Synthesis for Mismatched Protocols Vijay D’silva & S. Ramesh & Arcot Sowmya Center for Formal Design and Verification of Software, IIT Bombay School of Computer Science and Engineering, University o
Add to Reading List

Document Date: 2004-02-16 09:13:29


Open Document

File Size: 219,64 KB

Share Result on Facebook

Company

Bus Wrapper1 IP2 Bridge IP3 IP1 Wrapper2 Systems / n-Play / /

Facility

University of New South Wales Vijay D’silva / /

IndustryTerm

communication protocols / non-deterministic protocols / /

Organization

IIT Bombay School of Computer Science and Engineering / S. Ramesh & Arcot Sowmya Center for Formal Design and Verification of Software / University of New South Wales / /

Position

Chip Bus Arbiter Peripheral Bus Arbiter / /

Product

SDI iP1 Speakers / /

ProgrammingLanguage

D / /

Region

South Wales / /

Technology

Finite State Machine / non-deterministic protocols / two protocols / p.1/24 Peripheral Bus On−Chip / communication protocols / /

SocialTag