| Document Date: 2010-09-16 08:00:05
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City An HTML / London / / Company IBM / Toshiba / At / Altera / Sony / Intel / Xilinx / / Facility Wayne Luk Imperial College / VFLOAT library / / IndustryTerm benchmark applications / optimisation tool / test hardware / larger devices / corresponding hardware / scientific applications / software library / parallel computing power / unstable algorithm / host processor / automated computing machines / software compilers / sample applications / quantum chemistry applications / instrumentation tool / main target applications / suitable applications / selected applications / x86 processors / point applications / extra hardware / capable hardware / video processing libraries / computational science applications / place-and-route tools / computational finance / dynamic execution profiling tool / digital signal processing / target applications / / Organization US Federal Reserve / / Person Ashley W Brown / Paul H J Kelly / / Product Figure 5 / / ProgrammingLanguage Fortran / C / / Technology FPGA / unstable algorithm / host processor / floating point unit / FPGA system / HTML / DSP / VHDL / x86 processors / /
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Speculative Reduction of Floating Point Datapaths Ashley W Brown, Paul H J Kelly, Wayne Luk Imperial College London Abstract. This paper presents a methodology for generating floatingpoint arithmetic hardware designs wh