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CPU cache / Central processing unit / Non-Uniform Memory Access / Analysis of algorithms / Memory hierarchy / Computer memory / Computing / Cache


Tech. Rep[removed]Evaluation of Multiprocessor Memory Systems Using O -Line Optimal Behavior3 William J. Bolosky and Michael L. Scott Computer Science Department
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Document Date: 2011-03-27 21:03:30


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File Size: 1,97 MB

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City

Rochester / /

Company

IBM / 8Q 2 Plc / P 2 Plc / /

Currency

pence / /

/

Facility

Michael L. Scott Computer Science Department University of Rochester Rochester / dance hall / University of Maryland / /

IndustryTerm

trace-driven dynamic programming algorithm / interconnection network / erent processors / distinct processors / software policies / partial solution / on-line policy / distributed memory systems / per-processor / particular processor / coherence protocol / virtual memory systems / search space / tractable algorithm / multiprocessor memory management / software-controlled page migration / /

Organization

University of Maryland / National Science Foundation / Institute for Advanced Computer Studies / National Aeronautics and Space Administration / Michael L. Scott Computer Science Department University of Rochester Rochester / /

Person

Michael L. Scott / William J. Bolosky / /

Position

application programmer / /

ProvinceOrState

Maryland / /

Technology

erent processors / one processor / particular processor / coherence protocol / MIN algorithm / tractable algorithm / trace-driven dynamic programming algorithm / simulation / virtual memory / Parallel Processing / /

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