| Document Date: 2006-03-13 14:43:04
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Company IBM / Sun Microsystems Laboratories / / Facility University of Rochester December / / IndustryTerm greater flexibility than pure hardware / consensus algorithm / much software / software permits / stock processors / eager version management / software readers / lock-based algorithms / on-chip real estate / software vendors / hardware/software / proposed solutions / conflict management / software proposals / policy in software / lock-free algorithm / software implementations / directory-based coherence protocols / obstruction-free algorithm / normal coherence protocol / software transaction / Ad hoc nonblocking algorithms / software-centric hybrid strategy / coherence protocol / hybrid systems / cache coherence protocol / all-software system / contention management / memory management / simulation infrastructure / software control / Software systems / legacy hardware / / Organization National Science Foundation / Department of Computer Science / University of Rochester / / Person Michael L. Scott / William N. Scherer III / Michael F. Spear / L. Scott David Eisenstat / Christopher Heriot / / Position recent writer / arbitrary outof-band contention manager / software contention manager / writer / contention manager / external contention manager / programmer / / ProgrammingLanguage Haskell / R / C++ / / RadioStation Work 60 / / Technology TMESI protocol / directory-based coherence protocols / lock-based algorithms / blocking algorithm / lock-free algorithm / consensus algorithm / Java / API / 1 Ad hoc nonblocking algorithms / coherence protocol / instead designing chips / simulation / virtual memory / contention management algorithms / obstruction-free algorithm / cache coherence protocol / normal coherence protocol / Ad hoc nonblocking algorithms / CMP / /
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Hardware Acceleration of Software Transactional Memory∗ Arrvindh Shriraman, Virendra Marathe, Sandhya Dwarkadas, Michael L. Scott David Eisenstat, Christopher Heriot, William N. Scherer III, and Michael F. Spear Techni