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Date: 2015-10-04 23:56:37 | C vs. VHDL: Benchmarking CAESAR Candidates Using High-‐Level Synthesis and Register-‐Transfer Level Methodologies Ekawat Homsirikamol, WiAdd to Reading ListSource URL: www1.spms.ntu.edu.sgDownload Document from Source WebsiteFile Size: 3,58 MBShare Document on Facebook |