ARM Accelerator Coherency Port / Accelerator Coherency Port / Neural Acceleration Thierry Moreau Mark Wyse Jacob Nelson Adrian Sampson University of Washington Abstract / CPU Hadi Esmaeilzadeh Georgia Institute / SNNAP C library / Table I. Pipeline stalls / Zynq Programmable System-on-a-Chip Application Processing Unit OCM ACP port L2 / ACP port / /
IndustryTerm
neural-network processing / software approximation / prior neural network / energy comparisons / approximate computing literature / approximate computing / sub-systems / running hardware / multilayer perceptron neural network / neural networks / software checks / neural-network hardware / main energy / energy benefit / software execution / legacy software implementation / technology improvements / hardware neural networks / energy benefits / energy savings / software groups together invocations / buffer management / 2.8× energy savings / bare metal processor / systolic algorithm / conserve energy / software library / energy consumption / neural network / 2.77× energy savings / multi-layer perceptron neural networks / examined fault-tolerant hardware neural networks / approximate computing trades / software neural network library / level synthesis tools / order-ofmagnitude energy efficiency / energy measurements / average energy savings / programmable system-on-a-chip / larger neural networks / approximate hardware / energy efficiency / energy consumption using software / learned neural network / level synthesis tool / heterogeneous computing devices / /
MarketIndex
PARSEC / /
NaturalFeature
snnap_stream_t stream / /
Organization
University of Washington / Snoop Control Unit / MADD / PEs Weight Memory Sigmoid LUT Accumulator FIFO Sigmoid FIFO DSP Unit / Neural Acceleration Thierry Moreau Mark Wyse Jacob Nelson Adrian Sampson University of Washington Abstract / Sigmoid Unit / Georgia Institute of Technology / Processing Unit / /
Person
LUT PE / Hadi Esmaeilzadeh / /
Position
architect / Masters researcher / General / AXI Master Interface Scheduler / mobile SoC designer / Scheduler / DRAM controller / programmer / /
Product
General Purpose I/Os (GPIOs) interface / Vivado HLS / General Purpose I/Os (GPIOs) / /
SNNAP: Approximate Computing on Programmable SoCs via Neural Acceleration Thierry Moreau Mark Wyse