<--- Back to Details
First PageDocument Content
Instruction set architectures / Electronics / Digital signal processors / XCore XS1 / Microprocessors / XMOS / Thread / Multi-core processor / Opcode / Computing / Parallel computing / Computer architecture
Date: 2011-11-10 05:04:35
Instruction set architectures
Electronics
Digital signal processors
XCore XS1
Microprocessors
XMOS
Thread
Multi-core processor
Opcode
Computing
Parallel computing
Computer architecture

XMOS Architecture XS1 Chips David May XMOS Introduction

Add to Reading List

Source URL: www.cs.bris.ac.uk

Download Document from Source Website

File Size: 1,32 MB

Share Document on Facebook

Similar Documents

Energy Consumption Analysis of Programs based on XMOS ISA-Level Models U. Liqat1 , S. Kerrison2 , A. Serrano1 , K. Georgiou2 , P. Lopez-Garcia1,3 , N. Grech2 , M.V. Hermenegildo1,4 , and K. Eder2 1

Energy Consumption Analysis of Programs based on XMOS ISA-Level Models U. Liqat1 , S. Kerrison2 , A. Serrano1 , K. Georgiou2 , P. Lopez-Garcia1,3 , N. Grech2 , M.V. Hermenegildo1,4 , and K. Eder2 1

DocID: 1eTOm - View Document

xmos_logo_mmcu_cmyk_styled_x_bg_white

xmos_logo_mmcu_cmyk_styled_x_bg_white

DocID: 1dc4C - View Document

Communicating Processors Past, Present and Future David May Bristol University and XMOS  David May

Communicating Processors Past, Present and Future David May Bristol University and XMOS David May

DocID: 1ale6 - View Document

Why are Multicores a Challenge?  David May Bristol University and XMOS  Bristol

Why are Multicores a Challenge? David May Bristol University and XMOS Bristol

DocID: 1akTG - View Document

Why are Multicores a Challenge?  David May Bristol University and XMOS  Bristol

Why are Multicores a Challenge? David May Bristol University and XMOS Bristol

DocID: 1abCZ - View Document