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31	Faster Secure Two-Party Computation Using Garbled Circuits Yan Huang David Evans University of Virginia Add to Reading List Source URL: www.usenix.org Language: English - Date: 2011-06-09 13:31:32 Computational complexity theory Logic gates Circuit complexity Secure multi-party computation Levenshtein distance XOR gate Boolean circuit Circuit Adder Theoretical computer science Applied mathematics Cryptographic protocols
32	Cryptography with Asynchronous Logic Automata Peter Schmidt-Nielsen, Kailiang Chen, Jonathan Bachrach, Scott Greenwald, Forrest Green, and Neil Gershenfeld MIT Center for Bits and Atoms, Cambridge, MA Add to Reading List Source URL: www.cba.mit.edu Language: English - Date: 2011-12-17 09:30:36 Binary arithmetic Linear feedback shift register A5/1 Cellular automaton Field-programmable gate array Digital electronics Block cipher XOR gate Cryptography Electronic engineering Stream ciphers
33	LOGIC MODULES INTRODUCTION EXPANSION ACTIVITY Add to Reading List Source URL: s3.amazonaws.com Language: English - Date: 2014-05-06 16:08:52 Theoretical computer science XOR gate OR gate Negated AND gate Boolean algebra AND gate Adder Exclusive or Flip-flop Logic gates Electronic engineering Mathematical logic
34	Microsoft PowerPoint - DLG-200 v8 Add to Reading List Source URL: www.elenco.com Language: English - Date: 2015-03-23 14:55:29 Flip-flop XOR gate OR gate Negated AND gate Digital electronics Inverter Digital signal AND gate Comparator Logic gates Electronic engineering Electronics
35	Logic gates 1. Write in the names of the logic gates shown in the diagram and then complete the truth table for each gate. The first one (the NOT gate) has been done for you. Add to Reading List Source URL: www.schoolphysics.co.uk Language: English - Date: 2009-11-19 02:06:17 Electronics Negated AND gate AND gate CMOS XOR gate Logic gates Electronic engineering Digital electronics
36	Microsoft PowerPoint - DLG-100 v5 Add to Reading List Source URL: www.elenco.com Language: English - Date: 2015-03-23 14:42:49 XOR gate OR gate Digital electronics Inverter Negated AND gate Digital signal Diode logic Open collector Logic gates Electronic engineering Electronics
37	PLOTS OF LOGICAL OPERATIONS ON INTEGERS Below are 3D plots of and(x, y), or(x, y), and xor(x, y) as functions of integers x and y. These plots were produced by Mathematica. For each function, two plots are shown, one for Add to Reading List Source URL: www.hackersdelight.org Language: English - Date: 2004-08-05 22:37:12 Geometry Triangles Curves Topological spaces Sierpinski triangle Logarithm Function Mathematics Fractals Mathematical analysis
38	The University of Hong Kong, Department of Electrical & Electronic Engineering, Technical Report No. TR, AprilHTSC and FH HTSC: Flat XOR-based Erasure Codes to Reduce Access Latency in Cloud Storage Sy Add to Reading List Source URL: www.eee.hku.hk Language: English - Date: 2014-11-03 23:16:41 Information RAID Network coding Replication Binary tree Computer architecture Superconducting magnetic energy storage Fault-tolerant computer systems Computing Coding theory
39	Microsoft Word - Instructions_Lab1&2.doc Add to Reading List Source URL: web.physics.ucsb.edu Language: English - Date: 2005-01-19 19:35:28 Digital electronics XOR gate Adder Field-programmable gate array Negated AND gate Decoder OR gate Flip-flop AND gate Logic gates Electronic engineering Electronics
40	Learning Outcomes • At the end of this lecture you should: understand how logic relates to computing problems Add to Reading List Source URL: www.doc.ic.ac.uk Language: English - Date: 2012-09-05 06:45:45 Boolean algebra Logic gates Propositional calculus Logical connectives Algebraic logic XOR gate Exclusive or Truth table OR gate Mathematics Mathematical logic Abstract algebra

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