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Reconfigurable computing / Xilinx / Integrated circuits / Field-programmable gate array / Embedded systems / Delay-locked loop / Joint Test Action Group / Logic gate / Low-voltage differential signaling / Electronic engineering / Electronics / Digital electronics


Xilinx: Virtex-E 1.8V Field Programmable Gate Arrays
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Document Date: 2013-03-04 08:35:00


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File Size: 1,44 MB

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Company

Xilinx Inc. / See I/O Banking / RAMBUS / VCCO / VirtexE Device GCLK1 GCLK0 Bank / I/O. Bank / GCLK3 GCLK2 Bank / Integrated Device Technology Inc. / /

Facility

Fine Pitch Ball Grid Array HQ / Factory Tested / /

IndustryTerm

Internet Team Design / larger devices / capacity programmable logic solution / process technology / larger device / bank / given bank / given device / Web-based HDL generation methodology Sophisticated SelectRAM+™ Memory Hierarchy / capacity programmable logic solutions / bank affiliation / differential devices / /

Organization

Xilinx Foundation / /

Person

Weak Keeper SR / LUT SP / /

/

Position

output driver / representative / /

Product

Virtex / GCLK3 GCLK2 Bank 2 Bank 7 Bank 0 / /

ProgrammingLanguage

RC / /

Technology

FPGA / RAM / WSH / JTAG / SelectI/O technology / 5.9 ns Chip-to-Chip / SRAM / simulation / process technology / DSP / /

URL

http /

SocialTag