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Date: 2012-09-24 05:08:29Interrupt Synchronous dynamic random-access memory Clock gating Programmable Interrupt Controller Computing Electronics Interrupts Electronic engineering Interrupt request | A10 SO nly Allwinner Technology CO., Ltd.Add to Reading ListSource URL: dl.linux-sunxi.orgDownload Document from Source WebsiteFile Size: 4,60 MBShare Document on Facebook |
Power Reduction Through RTL Clock Gating By Frank Emnett and Mark Biegel Automotive Integrated Electronics CorporationDocID: 1sYa9 - View Document | |
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 22, NO. 4, APRILDesign Flow for Flip-Flop Grouping in Data-Driven Clock GatingDocID: 1loEA - View Document | |
Temperature-Aware GPU Design Jeremy W. Sheaffer, Kevin Skadron, and David P. Luebke University of Virginia Dept. of Computer Science {jws9c, skadron, luebke}@cs.virginia.edu The Need for Temperature-Aware DesignDocID: 1geTg - View Document | |
A10 SO nly Allwinner Technology CO., Ltd.DocID: 1aPJz - View Document | |
Datasheet Power Compiler Power Optimization in Design Compiler OverviewDocID: 15bD2 - View Document |