| Document Date: 2011-04-01 11:24:25
Open Document File Size: 286,85 KBShare Result on Facebook
City San Jose / / Company Checkpoint / REBOUND DESIGN Main Idea Rebound / / Country United States / / Currency pence / USD / / / Event FDA Phase / Product Issues / / Facility Checkpoint C1 Writebacks / Future checkpoint / Josep Torrellas University of Illinois / Checkpoint C0 Detection App / Checkpoint C1 Fault Future checkpoint / Checkpoint C1 Checkpoint C2 Fault Interval / Checkpoint Time Checkpoint C0 / Checkpoint Initiator / / IndustryTerm software log / cross-processor / energy consumption increase / software algorithm / consumer processors / molecules car 1M / coherence protocols / initiator processor / distributed software algorithms / on-chip energy consumption / functional hardware / directory protocol / coherence protocol / energy / shared-memory software algorithm / software structure / last arriving processor / off-chip / distributed checkpointing protocol / energy delay square product / parallel applications / consumer processor / message-passing systems / last writer processor / ocean simlarge simlarge simlarge simlarge ab tool / dependence chain / barrier-intensive applications / / Organization University of Illinois / SESC / / Person Figure / / Position back Delayed WB / fault model / WB / producer / second writer / L2 controller / last writer / writer / L2 cache controller / chkpt chkpt Producer / memory controller / controller / / Product MyConsumers / MyProducers / Pin / Pin tool / L2 / P5 / producer / Section / core / / ProvinceOrState California / / RadioStation Core / / Technology producer processors / directory-based protocol / last writer processor / shared-memory software algorithm / 24 processors / distributed checkpointing protocol / 3.4 Distributed Checkpointing Protocol / corresponding processors / second processor / 64 processors / checkpointing processors / Shared Memory / last arriving processor / owner processor / coherence protocols / 16 processors / participating processors / distributed software algorithms / 3.5 Distributed Rollback Protocol / one processor / software algorithm / data Address Manycore Chip / consumer processor / initiator processor / developing distributed software algorithms / consumer processors / coherence protocol / checkpointing protocol / LW-ID processor / MESI protocol / PBX / directory protocol / local processor / / URL http /
SocialTag |
Rebound: Scalable Checkpointing for Coherent Shared Memory Rishi Agarwal, Pranav Garg, and Josep Torrellas University of Illinois at Urbana-Champaign, USA {agarwa29,garg11,torrella}@illinois.edu