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Hardware verification languages / Aldec / Logic design / SystemVerilog / Verilog / SystemC / VHDL / E / Simulink / Electronic engineering / Hardware description languages / Electronic design automation
Date: 2015-05-05 17:04:52
Hardware verification languages
Aldec
Logic design
SystemVerilog
Verilog
SystemC
VHDL
E
Simulink
Electronic engineering
Hardware description languages
Electronic design automation

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