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Central processing unit / Instruction set architectures / Branch predictor / Alpha 21264 / CPU cache / Out-of-order execution / Register renaming / Microarchitecture / DEC Alpha / Computer architecture / Computer engineering / Computer hardware
Date: 2003-06-05 15:33:55
Central processing unit
Instruction set architectures
Branch predictor
Alpha 21264
CPU cache
Out-of-order execution
Register renaming
Microarchitecture
DEC Alpha
Computer architecture
Computer engineering
Computer hardware

Speculative Updates of Local and Global Branch History: A Quantitative Analysis Kevin Skadron SKADRON @ CS . VIRGINIA . EDU

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