University of Michigan Abstract Energy / University of California / Store Sets / /
IndustryTerm
energy consumption / energy dissipation / processor technologies / process technology / energy dissipation results / energy efficient cache architecture / process technology size / wide issue processors / technology sizes / process technology sizes / frontend processor / less energy / energy data / energy efficiency / computing / functional and timing simulation tools / reports energy data / low-energy instruction cache / overall chip energy consumption / energy / /
OperatingSystem
OSF/1 / /
Organization
University of Michigan Abstract Energy / US Federal Reserve / University of California / Los Angeles Department of Computer Science and Engineering / Electrical Engineering and Computer Science Department / FDP SP / Computer Science Department / University of California / San Diego / /
In Proceedings of the 4th International Symposium on High Performance Computing (ISHPC), May 2002, (c) Springer-Verlag. High Performance and Energy Efficient Serial Prefetch Architecture Glenn Reinman Brad Caldery