AltiVec - PDFSEARCH.IO - Document Search Engine

AltiVec
Results: 51

#	Item
1	Optimization of Vertical and Horizontal Beamforming Kernels on the PowerPC G4 Processor with AltiVec Technology Young H. Cho, David Brunke, and Greg E. Allen Applied Research Laboratories: The University of Texas at Aust Add to Reading List Source URL: users.ece.utexas.edu - Date: 2000-11-08 19:09:56
2	Symbolic Crosschecking of Floating-Point and SIMD Code Peter Collingbourne Cristian Cadar Paul H. J. Kelly Add to Reading List Source URL: www.doc.ic.ac.uk Language: English - Date: 2016-03-08 07:04:45 Concurrent computing Computing Computer architecture X86 instructions SIMD AltiVec Streaming SIMD Extensions Processor register SSE2 Symbolic execution MMX Constant folding
3	SPU C/C++ Language Extensions Version 2.1 CBEA JSRE Series Cell Broadband Engine Architecture Add to Reading List Source URL: moss.csc.ncsu.edu Language: English - Date: 2005-11-16 23:20:01 AltiVec Power Architecture Cell Processor register Find first set Euclidean vector Cell software development
4	Vertical and Horizontal Beamforming Kernels with AltiVec Technology Young H. Cho, David Brunke, Greg E. Allen, and Brian L. Evans* The University of Texas at Austin Austin, TXU.S.A Add to Reading List Source URL: users.ece.utexas.edu Language: English - Date: 2000-11-08 19:09:46 Sonar Sensor array Sensors Beamforming Compiler optimizations Loop unrolling AltiVec
5	3000 SERIES StarGate 3120 & 3120D PowerPC VXS Payload The StarGate 3120 & 3120D are the first FastCluster 3000 SERIES PowerPC AltiVec VXS payloads incorporating the latest improvements Add to Reading List Source URL: www.cspi.com Language: English - Date: 2015-04-14 11:59:55
6	2000 SERIESSERIES ISSPL-ALT Industry Standard Signal Processing LIbrary PowerPC with AltiVec Architecture The CSPI ISSPL-ALT (Industry Standard Signal Processing Library) Add to Reading List Source URL: www.cspi.com Language: English - Date: 2015-07-20 12:01:43
7	Universal SIMD-Mathlibrary Helmut Dersch Furtwangen University of Applied Sciences August 20, 2008 Abstract Standard functions for single precision floating point vector datatypes Add to Reading List Source URL: webuser.fh-furtwangen.de Language: English - Date: 2008-08-20 03:38:58 Computer architecture Computing Software Power Architecture X86 instructions Parallel computing Atan2 SIMD AltiVec Cell Atan SSE2
8	Vincent Gable \| \| hirevincent.com \| San Francisco, CA Languages and Frameworks: Objective-C, C, Assembler (PPC/AltiVec/SSE) Apple (DTS Engineer) \| October 2010 – Present Cupertino, Add to Reading List Source URL: www.vgable.com Language: English - Date: 2012-10-18 17:11:29
9	TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ, StarCore and Symphony are trademarks of Freescale Semiconductor Add to Reading List Source URL: kvm.et.redhat.com Language: English - Date: 2014-11-01 12:41:00 Software Computing QorIQ PowerQUICC Freescale ColdFire QUICC AltiVec CodeWarrior MobileGT Computer architecture Freescale Semiconductor Power Architecture
10	Changes to vector_execution_policy \| N4060 Pablo Halpern, Intel Corp Add to Reading List Source URL: www.open-std.org Language: English - Date: 2014-06-20 02:01:40 Compiler optimizations Vectorization SIMD AltiVec Central processing unit Task parallelism Sequence container Vector Stream processing Concurrent computing Computing Parallel computing

UPDATE