10GBASE-KR FEC Tutorial Andre Szczepanek (TI) Ilango Ganga (Intel) Cathy Liu (LSI logic) Magesh Valliappan (Broadcom) - Andre Reed - Document - PDFSEARCH.IO

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	10GBASE-KR FEC Tutorial Andre Szczepanek (TI) Ilango Ganga (Intel) Cathy Liu (LSI logic) Magesh Valliappan (Broadcom) Add to Reading List Document Date: 2006-07-14 18:08:07 Open Document File Size: 595,32 KB Share Result on Facebook City Uncoded / / Company PMC Sierra / Meggitt / Broadcom / LSI logic / Intel / / Currency Rs / / Person Ganga (Intel) Cathy Liu / Joe Caroselli / Andre Szczepanek / Luke Chang / Winston Mok / Fulvio Spagna / Andrey Ovchinnikov / Andrey Belogolovy / Jim Hamstra (Flextronics) / / ProgrammingLanguage DC / / ProvinceOrState x57=1 / / Technology Ethernet / simulation / / SocialTag 10 Gigabit Ethernet Coding theory Data transmission Telecommunications engineering Reed–Solomon error correction Symbol rate 64b/66b encoding Notation Information Error detection and correction

10GBASE-KR FEC Tutorial Andre Szczepanek (TI) Ilango Ganga (Intel) Cathy Liu (LSI logic) Magesh Valliappan (Broadcom)Add to Reading List