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CAVA: Hiding L2 Misses with Checkpoint-Assisted Value Prediction Luis Ceze, Karin Strauss, James Tuck, Jose Renau† and Josep Torrellas University of Illinois at Urbana-Champaign {luisceze, kstrauss, jtuck, torrellas}@c
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Document Date: 2004-12-21 00:54:20

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File Size: 60,37 KB

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Company

Checkpoint / OPB Subentry Destination Predicted Register Value ID C LC / /

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Facility

Checkpoint Processing / Josep Torrellas University of Illinois / University of California / /

IndustryTerm

regular applications / conventional systems / software prefetching / /

MarketIndex

IPC / /

OperatingSystem

Microsoft Windows / /

Organization

Explicitly-Addressed / University of Illinois / University of California / Santa Cruz / Lockup-Free Instruction Fetch/Prefetch Cache Organization / /

Person

Luis Ceze / Karin Strauss / James Tuck / Jose Renau / /

Position

Base Runahead/C Runahead/C w/ VP CAVA CAVA Perf VP / VP / pl vp / VP Perf Mem gr id / L2 cache controller / CAVA Perf VP / Value Predictor The L2 controller / head / /

ProgrammingLanguage

FP / C++ / /

ProvinceOrState

California / /

Technology

ROB-less processor / Out-of-order Processors / The processor / /

SocialTag